threshold logic – TechConnect Briefs

A Fan-in Bounded Low Delay Adder for Nanotechnology

Sun Y., Wagh M.D., Lehigh University, US

This paper presents an adder designed specifically for nanoelectronics. It exploits the basic characteristics of nanoelectronic technologies such as the RTD, SET and QCA to provide an adder that has a very low delay and [...]

On the Design of SET Adders

Sulieman M., Beiu V., Washington State University, US

Single-Electron-Technology (SET) is one of the future technologies distinguished by its small and low power devices. Among others, SET provides simple and elegant solutions for implementing threshold logic gates (TLG).One of the SET-TLG logic circuits [...]