pn junction – TechConnect Briefs

Compact Modeling of Avalanche Breakdown in pn-Junctions for Computer-Aided ESD Design (CAD for ESD)

Subramanian Y., Darling R.B., University of Washington, US

This paper presents and validates compact, physically-based electrothermal models of the avalanche process in pn junctions for use in network simulators (e.g. Saber). Self-heating effects are also included. This enables the simulation of large systems [...]

Tunneling-Assisted Currents in n+p+ Amorphous Silicon Junctions

Furlan J., Gorup Z., University of Ljubljana, SI

A theoretical model for the tunneling transport of charge carriers in forward-biased heavily doped amorphous silicon pn junctions was recently presented. In this paper, in addition to current-voltage characteristics in the forward direction, reverse-voltage characteristics [...]