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HomeAuthorsIino Y.

Authors: Iino Y.

HiSIM- Replacement of BSIM4 in UDSM Circuit Simulations

Iino Y., Pesic I., Silvaco Japan, JP
This paper presents HiSIM speed and convergence advantage against BSIM4 and PSP on a large variety of circuits such as memories, MPUs, PLLs, A/D and D/A converters, mixers etc.

HiSIM-1.2: The Effective Gate Length Validation with the Capacitance Data

Iino Y., Silvaco Japan, JP
HiSIM-1.2 model parameter extraction and the resulted fit for the current voltage characteristics were reported at WCM-2004 (Boston, MA, 2004). The measurement curves were reproduced well. However, the Cgc (the gate to the shorted source/drain) [...]

A Trial Report: HiSIM-1.2 Parameter Extraction for 90 nm Technology

Iino Y., Silvaco Japan, JP
This paper reports HiSIM-1.2 Spice model parameter extraction for a practical 90 nm technology devices. The extraction sequence with the measurement data will be exhibitted. The number of optimized HiSIM parameters were only 19 out [...]

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