Abe K. – TechConnect Briefs

Three-Dimensional Logic Architecture by Four-terminal Electrical Switches (FES) beyond Two-dimensional CMOS Architecture

Fujita S., Abe K., Lee T.H., Stanford University, US

The technology expected after the lithography limit to keep increasing the number of transistors is thought to be either use of new transistors such as CNT by bottom-up process or three-dimensional (3D) architecture. We have [...]

Novel Nonvolatile Logic Circuits with Three-Dimensionally Stacked Nanoscale Memory Device

Abe K., Fujita S., Lee T.H., Toshiba Corporation, JP

Various emerging memories have been proposed for ultra high-density memory, such as phase change memory, organic memory or resistive memory. However, the potential of the emerging memories is not limited to RAM only. We have [...]